As part of the process for fabricating semiconductor devices, an integrated circuit chip is frequently assembled in a package in a final process step to complete the fabrication process. The assembled package can then be connected to a printed circuit board as part of a larger circuit to establish an electrical connection between the integrated circuit chip and the board. A wire bonding process is frequently used to connect the multiplicity of bond pads formed on the integrated circuit to the outside, or surrounding circuitry.
In a typical integrated circuit chip, active circuit elements such as transistors, resistors, capacitors, etc., are positioned in the central portion, i.e., the active region of the chip while the bond pads are normally arranged around the periphery of the active region, so that the active circuit elements are not likely to be damaged during a subsequent bonding process. When a wire bonding process is performed on a bond pad formed on an IC chip, the process normally entails the bonding of a gold or aluminum wire to the bond pad by fusing the two together with ultrasonic energy. The wire is then pulled so as to stretch the wire away from the bond pad after the bond between the wire and the pad is formed.
As the complexity and density of IC chips continues to increase, the number of adjacent bond pads and their proximity to each other increases. Because the bond pads are normally formed on a common semiconductor substrate, electrical current sometimes leaks between adjacent bond pads through the substrate, thus giving rise to reduced signal level, signal errors, or even short circuits producing circuit malfunction.
Accordingly, there is a clear need in the art for an improved bond pad structure that exhibits improved electrical isolation between adjacent bond pads, thereby preventing leakage currents between the pads. The present invention is directed to satisfying this need in the art.